This collection is a standard for the exchange of product model data (STEP) module and resource library (SMRL). It is intended for those who are considering adopting ISO 10303 modular application protocols, application modules, and resource parts, or systems built on them, for product data representation …
Reference number
ISO/TS 10303-1617:2006
ISO/TS 10303-1617:2006
© ISO 2024
Technical Specification
ISO/TS 10303-1617:2006
Industrial automation systems and integration — Product data representation and exchange — Part 1617: Application module: AP210 interconnect design
Edition 1
2006-12
2006-12
Technical Specification
ISO/TS 10303-1617:2006
42395
Publicado
(Edición 1, 2006)
Esta publicación se revisó y confirmó por última vez en 2023.
Por lo tanto, esta versión es la actual.
Resumen
ISO/TS 10303-1617:2006 specifies the application module for AP210 interconnect design.
ISO/TS 10303-1617:2006 deals with the representation of interconnect design. This data provides functional and physical layout information sufficient to allow manufacture and test of an interconnect. Design re-use is explicitly supported with traceability. Complete traceability back to requirements is provided. Product connection requirements, shape requirements, product specifications, process specifications, material specifications including manufacturing view of stackup, geometric dimensioning and tolerancing are provided. This data identifies those elements that do not meet design requirements. This data includes both design view and usage view of the interconnect product. Support for specification of signal prioritization is provided. Support for specifying the explicit network topology to be implemented is provided. Configuration management information and design change management information is provided. This data includes at least one geometric representation.
The following are within the scope of ISO/TS 10303-1617:2006:
- two dimensional layered interconnect substrate;
- configuration management data;
- design management data;
- three dimensional layered interconnect substrate;
- three dimensional molded interconnect substrate;
- material conductivity classification;
- as-routed connections;
- embedded components;
- test points;
- tolerance based cutout design;
- tolerance based cavity design;
- as-required connections;
- partially routed connections;
- pre-defined printed templates for design re-use;
- printed template definitions with terminals defined with a point on a surface;
- geometric properties for trace layout;
- geometric properties for pad taper layout;
- explicit definition of terminals of the interconnect substrate;
- explicit definition of cavities and cutouts of the interconnect substrate required for components;
- mapping between the explicit definition of terminals and internal design features.
Informaciones generales
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Estado: PublicadoFecha de publicación: 2006-12Etapa: Norma Internacional confirmada [90.93]
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Edición: 1Número de páginas: 100
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Comité Técnico :ISO/TC 184/SC 4ICS :25.040.40
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